Process alternative: SOI for heterogeneous systems

Transistor models which reproduce the superior device characteristics of fully depleted siliconon- insulator (SOl) MOSFETs and which are etticient for the design of analogue CMOS circuits are discussed and validated. These analogue models are then used to investigate the significant performance improvement that several basic analogue cells can achieve when optimized in fully depleted SO1 CMOS, rather than in bulk CMOS technology. Experimental verifications support this original demonstration of the great potential of fully depleted SOl CMOS for low voltage, low power analogue applications.