Analogue and RF performances of Fully Depleted SOI MOSFET (invited paper)

Performance of RF integrated circuit (IC) is directly linked to the analogue and high frequency characteristics of the transistors, the quality of the back-end of line process as well as the electromagnetic properties of the substrate. Thanks to the introduction of the trap-rich high-resistivity Silicon-on-Insulator (SOI) substrate on the market, the ICs requirements in term of linearity are fulfilled. Today Partially Depleted (PD) SOI MOSFET is the mainstream technology for RF SOI systems. Future generations of mobile communication systems will require transistors with better high frequency performance operating at lower power consumption and in the millimeter-waves range. Fully Depleted (FD) SOI MOSFET is a quite promising candidate for the development of these future wireless communication systems. Most of the reported data on FD SOI concern their digital performance. In this paper, their analogue/RF behaviour is described and compared with bulk MOSFETs. Self-heating issue, non-linear behaviour as well as high frequency performance at cryogenic temperature for FD SOI MOSFET are discussed. Finally, a brief summary of the published RF and millimeter-waves ICs based on FD SOI technology is presented.