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Asymmetric Self-Cascode Current-Voltage Constructing Algorithm for Analog Figures-of-Merit Extraction

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Martins d'Oliveira, Ligia [Electrical Engineering Department, Centro Universitário FEI, São Bernardo do Campo, Brazil] de Souza, Michelly [Electrical Engineering Department, Centro Universitário FEI, São Bernardo do Campo, Brazil] Kilchytska, Valeriya [UCL] Flandre, Denis [UCL]

This paper proposes an analysis of a self-cascode IV constructing algorithm for the extraction of DC analog figures of merit, namely the transconductance, output conductance and intrinsic voltage gain. The algorithm was applied on input tables of measured single Fully-depleted Silicon on Insulator (FDSOI) nMOSFETs and was validated on the measured self-cascode association of these devices. The results show an appropriate accuracy, that reflect trends and values with low error.

Document type Communication à un colloque (Conference Paper) – Présentation orale avec comité de sélection
Access type Accès libre
Publication date 2018
Language Anglais
Conference "2018 33rd Symposium on Microelectronics Technology and devices (SBMicro 2018)", Bento Gonçalves, Rio Grande do Sul (Brazil ) (du 27/08/2018 au 31/08/2018)
Journal information "proceedings of SBMicro 2018"
Peer reviewed yes
Publication status Publié
Affiliation UCL - SST/ICTM/ELEN - Pôle en ingénierie électrique
Keywords FDSOI; ; Algorithm; ; Self-Cascode; ; Asymmetric Self- Cascode
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Bibliographic reference Martins d'Oliveira, Ligia ; de Souza, Michelly ; Kilchytska, Valeriya ; Flandre, Denis. Asymmetric Self-Cascode Current-Voltage Constructing Algorithm for Analog Figures-of-Merit Extraction.2018 33rd Symposium on Microelectronics Technology and devices (SBMicro 2018) (Bento Gonçalves, Rio Grande do Sul (Brazil ), du 27/08/2018 au 31/08/2018). In: proceedings of SBMicro 2018,
Permanent URL http://hdl.handle.net/2078.1/209355