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Comparison of SOI, poly-Si TFT and bulk Si MOS performance using gm/ID methodology

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Takatori, Kenichi [SOG Research Laboratories, NEC Corporation, Japan] Flandre, Denis [UCL]

The poly-Si TFT is a member of the SOI family which recently achieves higher levels of performance and integration onto glass substrate. However, in the TFT analogue circuit fields, a systematic design methodology is still lacking. Standard SOI or bulk Si analog design techniques can not be directly extended to TFT because of the unique I-V characteristics caused by trap effects in TFT. In this work we modified the gm/Id analog design methodology to extend it to TFT technology. The comparison of analog performance of various technologies, i.e. bulk silicon, SOI and TFT, has been made through the common-source amplifier case.

Document type Communication à un colloque (Conference Paper) – Présentation orale avec comité de sélection
Publication date 2003
Language Anglais
Conference "11th International Symposium «Silicon-on-Insulator Technology and Devices"", Paris (France) (du 27/04/2003 au 02/05/2003)
Peer reviewed yes
Host document S.Cristoloveanu ; "Proceedings of the 11th International Symposium «Silicon-on-Insulator Technology and Devices""- 301-306 (ISBN : 1-56677-375-X)
Affiliation UCL - FSA/ELEC - Département d'électricité
Keywords Polycrystal ; Amplifier ; Voltage current curve ; Analog circuit ; Performance evaluation ; Thin film transistor ; Silicon on insulator technology ; Comparative study
Links
Bibliographic reference Takatori, Kenichi ; Flandre, Denis. Comparison of SOI, poly-Si TFT and bulk Si MOS performance using gm/ID methodology.11th International Symposium «Silicon-on-Insulator Technology and Devices" (Paris (France), du 27/04/2003 au 02/05/2003). In: S.Cristoloveanu, Proceedings of the 11th International Symposium «Silicon-on-Insulator Technology and Devices", 2003, p.301-306
Permanent URL http://hdl.handle.net/2078.1/113916