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Robust and Energy-Efficient Ultra-Low-Voltage Circuit Design under Timing Constraints in 65/45 nm CMOS

Bibliographic reference Bol, David. Robust and Energy-Efficient Ultra-Low-Voltage Circuit Design under Timing Constraints in 65/45 nm CMOS. In: Journal of Low Power Electronics and Applications, Vol. 1, no. 1, p. 1-19 (25/01/2011)
Permanent URL http://hdl.handle.net/2078.1/85059
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