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Improvement of sub-0.25 mu m fully-depleted SOI CMOS analog performance by thinning the Si film

Bibliographic reference Neve, A. ; Dessard, V. ; Delatte, Pierre ; Brodeoux, V. ; Iniguez, B. ; et. al. Improvement of sub-0.25 mu m fully-depleted SOI CMOS analog performance by thinning the Si film.Silicon-On-Insulator Technology and Devices X. Proceedings of the Tenth International Symposium (Washington, DC (USA), du 25/03/2001 au 29/03/2001). In: Cristoloveanu, S.; Hemment, P.L.F.; Izumi, K.T.; Celler, G.K.; Assaderaghi, F.; Kim, Y-W;, Silicon-on-Insulator Technology and Devices X. Proceedings of the TenthInternational Symposium (Electrochemical Society Proceedings Vol.2001-3), Electrochem. soc2001, p.271-276
Permanent URL http://hdl.handle.net/2078.1/68090