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Power-delay product minimization in high-performance 64-bit carry-select adders

Bibliographic reference Neve, Amaury ; Schettler, Helmut ; Ludwig, Thomas ; Flandre, Denis. Power-delay product minimization in high-performance 64-bit carry-select adders. (du 09/08/2004 au 11/08/2004). In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 12, no. 3, p. 235-244 (2004)In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Ieee-inst Electrical Electronics Engineers Inc : Piscataway2004, p.235-244
Permanent URL http://hdl.handle.net/2078.1/61310