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An 80-MHz 0.4V ULV SRAM macro in 28nm FDSOI achieving 28-fJ/bit access energy with a ULP bitcell and on-chip adaptive back bias generation

Bibliographic reference Haine, Thomas ; Nguyen, Quoc-Khoi ; Stas, François ; Moreau, Ludovic ; Flandre, Denis ; et. al. An 80-MHz 0.4V ULV SRAM macro in 28nm FDSOI achieving 28-fJ/bit access energy with a ULP bitcell and on-chip adaptive back bias generation.43rd IEEE European Solid State Circuits Conference (ESSCIRC 2017) (Leuven (Belgium), du 11/09/2017 au 14/09/2017). In: Proceedings of the 43rd IEEE European Solid State Circuits Conference (ESSCIRC 2017), IEEE2017
Permanent URL http://hdl.handle.net/2078.1/188405