Tunnel junction engineering for optimized metallic single-electron transistor

El Hajjam, K.G. [Institut National des Sciences Appliquées de Lyon, France] Bounouar, M.A. [Institut National des Sciences Appliquées de Lyon, France] Baboux, N. [Institut National des Sciences Appliquées de Lyon, France] Ecoffey, Serge [Université de Sherbrokke, Canada] Guilmain, M. [Université de Sherbrokke, Canada] Puyoo, E. [Institut National des Sciences Appliquées de Lyon, France] Francis, Laurent [UCL] Souifi, A. [Institut National des Sciences Appliquées de Lyon, France] Drouin, D. [Université de Sherbrokke, Canada] Calmon, F. [Institut National des Sciences Appliquées de Lyon, France] et al.[show all]

The development of metallic single-electron transistor (SET) depends on the downscaling and the electrical properties of its tunnel junctions (TJs). These TJs should insure high-ON current, low-OFF current, and low capacitance. We propose an engineered TJ based on multidielectric stacking. A number of high-k and low-k materials were considered to optimize the TJ's characteristics. The optimized TJ is proven to increase the ION current and the ION/IOFF ratio in a double-gate SET. Using TiO2 plasma oxidation and Al2O3 atomic layer deposition, an SET proof of concept, with a double layer TJ, was fabricated and characterized.