Tang, Xiaohui
[UCL]
Katcki, J.
[Institute of Electron Technology, Warsaw]
Dubois, Emmanuel
[IEMN/ISEN, Villeneuve d'Ascq]
Ratajczak, J.
[Institute Of Electron Technology, Warsaw]
Larrieu, Guillaume
[IEMN/ISEN, Villeneuve d'Ascq]
Loumaye, Pierre
[UCL]
Nisole, Olivier
[UCL]
Bayot, Vincent
[UCL]
We investigate Er silicide formed on n-type silicon. In order to protect Er from oxidation during the formation of Er silicide in non-UHV conditions, a Pt layer is deposed successively on top of Er layer. Surprinsingly, we observe that Pt remains essentially unaffected in the formation of Er silicide at 600°C. A simplified method of analysis considering the final Schottky-barrier SOI-MOSFET application has been used to characterize the Schottky barrier of the PtEr-stack silicide system. A very low Schottky barrier (smaller than 0.1eV) on a n-type substrate with a concentration of 1.4x10exp.16 cm³ in the active region has been obtained.
Bibliographic reference |
Tang, Xiaohui ; Katcki, J. ; Dubois, Emmanuel ; Ratajczak, J. ; Larrieu, Guillaume ; et. al. Very low Schottky barrier to n-type silicon with PtEr-stack silicide.203th Meeting of the Electrochemical Society 2003 (Paris (France), du 28/04/2003 au 30/04/2003). |
Permanent URL |
http://hdl.handle.net/2078.1/135173 |