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Displaying 4 results.
    • Speech
    Design of a Robust and Ultra-Low-Voltage Pulse-Triggered Flip-Flop in 28nm UTBB-FDSOI Technology
    Bernard, Sébastien Valentian, Alexandre Belleville, Marc Bol, David[UCL] Legat, Jean-Didier[UCL] (2013) 2013 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S 2013) — Monterey, CA (USA)
    • Speech
    An Efficient Metric of Setup Time for Pulsed Flip-Flops based on Output Transition Time
    Bernard, Sébastien Valentian, Alexandre Belleville, Marc Bol, David[UCL] Legat, Jean-Didier[UCL] (2013) IEEE 2013 International Conference on IC Design and Technology (ICICDT 2013) — Pavia (Italy)
    • Speech
    Experimental Analysis of Flip-Flops Minimum Operating Voltage in 28nm FDSOI and the Impact of Back Bias and temperature
    Bernard, Sébastien Belleville, Bernard Valentian, Alexandre Legat, Jean-Didier[UCL] Bol, David[UCL] (2014) International Workshop on Power And Timing Modeling, Optimization and Simulation (PATMOS 2014) — Palma de Mallorca (Spain)