Accès à distance ? S'identifier sur le proxy UCLouvain
Planar Double-Gate SOI MOS devices by wafer bonding over pre-patterned cavities
Primary tabs
Document type | Article de périodique (Journal article) – Article de recherche |
---|---|
Access type | Accès restreint |
Publication date | 2007 |
Language | Anglais |
Journal information | "Solid-State Electronics" - Vol. 51, no. 2, p. 231-238 (2007) |
Peer reviewed | yes |
Publisher | Pergamon ((United Kingdom) Kidlington) |
issn | 0038-1101 |
e-issn | 1879-2405 |
Publication status | Publié |
Affiliations |
UCL
- FSA/ELEC - Département d'électricité Chalmers University of Technology - Department of Microtechnology and Nanoscience (MC2) |
Keywords | Wafer bonding ; CMOS process ; Planar double-gate MOSFET ; Silicon-on-insulator ; Volume inversion |
Links |
Bibliographic reference | Chung, Tsung Ming ; Olbrechts, Benoit ; Flandre, Denis ; Södervall, U. ; Bengtsson, S. ; et. al. Planar Double-Gate SOI MOS devices by wafer bonding over pre-patterned cavities. In: Solid-State Electronics, Vol. 51, no. 2, p. 231-238 (2007) |
---|---|
Permanent URL | http://hdl.handle.net/2078.1/89444 |