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Design of a distributed amplifier with on-chip ESD protection circuit in 130 nm SOI CMOS technology

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Si Moussa, M. El Kaamouchi, Majid [UCL] Wybo, G. Bens, A. Raskin, Jean-Pierre [UCL] Vanhoenacker-Janvier, Danielle [UCL]

A fully integrated common source distributed amplifier (CSDA) with ESD protection, designed and fabricated in 130 nm SOI CMOS technology, is presented. This CSDA requires a chip area of 0.75 mm/sup 2/ . A gain of 4.5 dB and a unity-gain bandwidth of 30 GHz are measured at 1.4 V supply voltage with a measured power consumption of 66 mW. Low capacitance diode is used for electrostatic discharge (ESD) protection for the RF input pin without altering the original design of the CSDA. The CSDA has an ESD protection level up to 1.45 A transmission line pulse (TLP) current, corresponding to 2 kV human body model (HBM) stress.

Document type Communication à un colloque (Conference Paper) – Présentation orale avec comité de sélection
Publication date 2006
Conference "2007 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems", Long Beach, CA, USA (10-12 January 2007)
Peer reviewed yes
Host document "2007 Topical Meeting on Silicon Monolithic Integrated Circuits in RFSystems (IEEE Cat No. 07EX1459C)"- 4 pp. (ISBN : 0-7803-9764-9)
Publisher IEEE
Publication status Publié
Affiliation UCL
Links
Bibliographic reference Si Moussa, M. ; El Kaamouchi, Majid ; Wybo, G. ; Bens, A. ; Raskin, Jean-Pierre ; et. al. Design of a distributed amplifier with on-chip ESD protection circuit in 130 nm SOI CMOS technology.2007 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (Long Beach, CA, USA, 10-12 January 2007). In: 2007 Topical Meeting on Silicon Monolithic Integrated Circuits in RFSystems (IEEE Cat No. 07EX1459C), IEEE2006, p.4 pp.
Permanent URL http://hdl.handle.net/2078.1/67891