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The Esd Protection Mechanisms and the Related Failure Modes and Mechanisms Observed in Soi Snapback Nmosfets

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Verhaege, K. Groeseneken, G. Colinge, JP. Maes, HE.

The objective of this paper is to discuss the characteristics of SOI1 nMOSFET's that can be exploited to clamp HBM(2) ESD(3) stresses and to explain the related failure modes and mechanism observed in these devices. The influence on the HBM ESD protection capability of the first order main parameter: the nMOSFET gate length is investigated. The ESD protection capability for both positive and negative polarity HBM stresses is elaborated and compared. The ESD clamping and device failure mechanisms limiting the ESD protection performance are identified.

Document type Article de périodique (Journal article) – Article de recherche
Access type Accès restreint
Publication date 1995
Language Anglais
Journal information "Microelectronics Reliability" - Vol. 35, no. 3, p. 555-566 (1995)
Peer reviewed yes
Publisher Pergamon-elsevier Science Ltd (Oxford)
issn 0026-2714
e-issn 1872-941X
Publication status Publié
Affiliation UCL
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Bibliographic reference Verhaege, K. ; Groeseneken, G. ; Colinge, JP. ; Maes, HE.. The Esd Protection Mechanisms and the Related Failure Modes and Mechanisms Observed in Soi Snapback Nmosfets. In: Microelectronics Reliability, Vol. 35, no. 3, p. 555-566 (1995)
Permanent URL http://hdl.handle.net/2078.1/48207