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LDD Depletion Effects in Thin-BOX FDSOI Devices with a Ground Plane

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Yan, Ran [Tyndall National Institute, University of Cork] Duane, R. [Tyndall National Institute, University of Cork] Razavi, P. [Tyndall National Institute, University of Cork] Afzalian, Aryan [UCL] Ferain, Isabelle [Tyndall National Institute, University of Cork] Colinge, Jean-Pierre [Tyndall National Institute, University of Cork]

In this paper, we analyze LDD depletion effects in Fully-Depleted SOI (FDSOI) devices with thin-BOX and ground plane (GP). LDD engineering is introduced to reduce the source and drain resistance and threshold voltage shifts. Short-channel effects are rather insensitive to SOI layer thickness variations and remains well controlled for gate lengths down to 15nm.

Document type Communication à un colloque (Conference Paper) – Présentation orale avec comité de sélection
Access type Accès restreint
Publication date 2009
Language Anglais
Conference "2009 IEEE International SOI Conference", Foster City (USA) (du 04/10/2009 au 07/10/2009)
Peer reviewed yes
Host document "Proceedings of the 2009 IEEE International SOI Conference"- p. 2 pages
Publisher IEEE
Publication status Publié
Affiliation UCL - FSA/ELEC - Département d'électricité
Keywords LDD depletion effects ; FD SOI
Links
Bibliographic reference Yan, Ran ; Duane, R. ; Razavi, P. ; Afzalian, Aryan ; Ferain, Isabelle ; et. al. LDD Depletion Effects in Thin-BOX FDSOI Devices with a Ground Plane.2009 IEEE International SOI Conference (Foster City (USA), du 04/10/2009 au 07/10/2009). In: Proceedings of the 2009 IEEE International SOI Conference, IEEE2009, p. 2 pages
Permanent URL http://hdl.handle.net/2078.1/122259