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A 25MHz 7μW/MHz Ultra-Low-Voltage Microcontroller SoC in 65nm LP/GP CMOS for Low-Carbon Wireless Sensor Nodes

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Bol, David [UCL] De Vos, Julien [UCL] Hocquet, Cédric [UCL] Durvaux, François [UCL] Botman, François [UCL] Flandre, Denis [UCL] Legat, Jean-Didier [UCL]

A 65nm 25MHz ultra-low-voltage microcontroller SoC is implemented with an embedded all-digital adaptive voltage scaling system, a glitch-masking instruction cache with no miss latency and a robust clock tree for low-voltage timing closure. It achieves 7µW/MHz power consumption in active mode, 1.5µW sleep power and 0.66mm² area to save on carbon footprint of sensor nodes.

Document type Communication à un colloque (Conference Paper) – Présentation orale avec comité de sélection
Access type Accès restreint
Publication date 2012
Language Anglais
Conference "International Solid-State Circuits Conference", San Francisco (du 19/02/2012 au 23/02/2012)
Journal information "IEEE International Solid State Circuits Conference. Digest of Technical Papers" - Vol. 55, no. 1, p. 490-491 (February 2012)
Peer reviewed yes
issn 0193-6530
Host document
Publisher I E E E
Publication status Publié
Affiliations UCL - SST/ICTM/ELEN - Pôle en ingénierie électrique
Berkeley - P.E. International
Keywords CMOC integrated circuits ; Low-Power ; System-on-Chip ; SOC ; Adaptive voltage scaling ; Carbon footprint
Links
Bibliographic reference Bol, David ; De Vos, Julien ; Hocquet, Cédric ; Durvaux, François ; Botman, François ; et. al. A 25MHz 7μW/MHz Ultra-Low-Voltage Microcontroller SoC in 65nm LP/GP CMOS for Low-Carbon Wireless Sensor Nodes.International Solid-State Circuits Conference (San Francisco, du 19/02/2012 au 23/02/2012). In: IEEE International Solid State Circuits Conference. Digest of Technical Papers, Vol. 55, no. 1, p. 490-491 (February 2012)
Permanent URL http://hdl.handle.net/2078.1/109982