Study of GPS L1 C/A acquisition channels for a low-Earth orbit FPGA-SDR GPS receiver satellite

This master thesis provides a study of the GPS L1 C/A signal acquisition. The goal is to develop an acquisition channel for a GPS receiver which will be embedded on a low-Earth orbit satellite of the company Aerospacelab. A software-defined radio implemented on a field programmable gate array is used to optimize the performances and resource consumption of the design. To this end, a state-of-the-art of the GNSS technology is first established, with a detailed description of the GPS L1 C/A signal. Second, the theoretical structure of the acquisition channel of a GPS receiver is explained and the different acquisition algorithms and their specificities are discussed. Afterwards, the available hardware is presented. The actual VHDL implementation on the design tool Vivado from Xilinx is then discussed with a focus on the non-idealities inherent to the practical design of the processing chain. Finally, the testing of an acquisition channel is performed on captured GNSS data, allowing to validate the correct behavior of the system.