Cloud gaming using remote FPGA-based JPEG-XS encoding

This master thesis focuses on the implementation of a hardware nest for a JPEG-XS video compression IP core in the framework provided by Amazon Web Services (AWS) and their FPGA-equipped commercial servers. The targeted application is cloud gaming, where video game streams have to be transmitted at low latency from a server where the game resides towards the user playing it. This implementation intends to use the FPGAs present on those AWS servers to provide a low-latency compression module capable of being used by the server OS to compress then transmit the video game streams that it generates. The resulting FPGA image was generated entirely remotely through the AWS FPGA Hardware and Software Development Kit framework. It can receive, modify, and transmit data back from the host server software using AXI4 data transfers at an estimated speed close to 145MB/s. This work has been carried out in collaboration with intoPIX s.a., a key player in developing and standardizing the JPEG-XS video codec.