Characterization of hardware accelerator for deep learning inference and integration in embedded system

Deep Learning has lead to a revolution in the field of computer vision in recent years, but in some contexts there still are serious barriers to its usage. For real-time applications in embedded systems (present in sectors such as autonomous vehicles, aerospace equipment and drones), deep convolutional neural networks are usually too resource-demanding to be executed within the timing requirements due to the constraints of the hardware available. To tackle this issue, recent publications propose new neural networks that are lighter and faster to be executed than their predecessors. Besides that, new devices are reaching the market targeting specifically the acceleration of deep learning inference on edge devices, enabling deep learning to be performed out of computer clusters and servers. Nevertheless, for some of those products, it lacks information about their run-time performance, which is essential for developers to be able to make the best choice before acquiring and using them. Therefore, this project consists of characterizing the capabilities of one such a hardware accelerator designed for image analysis, the Intel Movidius Myriad X VPU, for prediction of typical convolutional neural networks for image classification in terms of throughput and power consumption. Additionally, a comparison between this device and other commercially available options for the same task is made. Moreover, this project also proposes the hardware interface for using an expansion card carrying two Movidius Myriad X VPU's with a development board for embedded systems, the Xilinx ZC706, through a PCIe interface. This is the initial phase of a project for integrating deep learning capabilities in the products of Aerospacelab, the partner company of this master thesis.