Ultra-low-power frequency synthesizer for long-range 4G/5G radio IoT transceivers

One of the main challenges an Internet of Things (IoT) object has to overcome is to perform its functions of sensing, processing and transmitting information while operating with stringent power constraints. The transmission is the less energy efficient of these functions due to the physical limitations of the air as a communication channel. It becomes even more difficult for numerous IoT applications where the information needs to be transmitted over long distances. Thankfully, many of them do not have high data rate requirements and can exploit the Low-Power Wide Area Networks. With the objective of optimizing the power of radio transceivers for this kind of IoT applications, this work studies the possible advantages that a back-bias-controlled ring oscillator (BBCO), as the central block of a phase-locked loop (PLL), could bring to long-range communications compared to other PLL types. Therefore, an ultra-low-power BBCO-based PLL is designed in the 28nm Fully-Depleted Silicon-on-Insulator (FD-SOI) CMOS technology and its power and phase noise performances are compared to state-of-the-art transceivers. A 30x reduction on the power consumption resulted, compared to the transceiver designed by Lachartre et al. which was used as a design reference in this work, in spite of an increase of 30dB of phase noise, but the specifications were still met. The advantage found of BBCO-based PLLs was thus the ability to go to lower power consumption than other PLL types. Further studies are recommended towards additional power savings and more in-depth studies of the PLL noise sources.