Frame buffer compression for power-aware HEVC codec

In a world where more and more video contents are consumed and where those video contents tend to be bigger and bigger, the design of new, better performing video codecs has become a real challenge. The improved compression performance comes at the cost of an increased complexity. This complexity leads to more power-hungry hardware designs. In this context, this thesis explores a technique called frame buffer compression. This technique aims at reducing the power consumed by video codecs induced by memory accesses. More specifically, this thesis includes frame buffer compression in a new video codec : H.265/HEVC.